Searched refs:TIMER_CTL_REG (Results 1 – 2 of 2) sorted by relevance
32 #define TIMER_CTL_REG(val) (0x10 * val + 0x10) macro60 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()61 writel(val & ~TIMER_CTL_ENABLE, base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_stop()74 u32 val = readl(base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()82 base + TIMER_CTL_REG(timer)); in sun4i_clkevt_time_start()181 timer_of_base(&to) + TIMER_CTL_REG(1)); in sun4i_timer_init()203 timer_of_base(&to) + TIMER_CTL_REG(0)); in sun4i_timer_init()
29 #define TIMER_CTL_REG(val) (0x20 * (val) + 0x10) macro83 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()84 writel(val & ~TIMER_CTL_ENABLE, ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_stop()96 u32 val = readl(ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_start()104 ce->timer.base + TIMER_CTL_REG(timer)); in sun5i_clkevt_time_start()224 base + TIMER_CTL_REG(1)); in sun5i_setup_clocksource()