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Searched refs:length_dw (Results 1 – 25 of 70) sorted by relevance

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/linux-5.15/drivers/gpu/drm/radeon/
A Dsi_dma.c78 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages()
80 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pages()
81 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pages()
82 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
83 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
119 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages()
120 ib->ptr[ib->length_dw++] = pe; in si_dma_vm_write_pages()
121 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
132 ib->ptr[ib->length_dw++] = value; in si_dma_vm_write_pages()
133 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_write_pages()
[all …]
A Dradeon_vce.c362 ib.length_dw = 0; in radeon_vce_get_create_msg()
363 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */ in radeon_vce_get_create_msg()
364 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */ in radeon_vce_get_create_msg()
365 ib.ptr[ib.length_dw++] = cpu_to_le32(handle); in radeon_vce_get_create_msg()
367 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */ in radeon_vce_get_create_msg()
368 ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */ in radeon_vce_get_create_msg()
369 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000); in radeon_vce_get_create_msg()
370 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042); in radeon_vce_get_create_msg()
371 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a); in radeon_vce_get_create_msg()
372 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); in radeon_vce_get_create_msg()
[all …]
A Dni_dma.c145 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
326 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in cayman_dma_vm_copy_pages()
328 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cayman_dma_vm_copy_pages()
329 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cayman_dma_vm_copy_pages()
330 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
331 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in cayman_dma_vm_copy_pages()
367 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, in cayman_dma_vm_write_pages()
369 ib->ptr[ib->length_dw++] = pe; in cayman_dma_vm_write_pages()
370 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_write_pages()
381 ib->ptr[ib->length_dw++] = value; in cayman_dma_vm_write_pages()
[all …]
H A Dradeon_cs.c95 p->nrelocs = chunk->length_dw / 4; in radeon_cs_parser_relocs()
316 p->chunks[i].length_dw = user_chunk.length_dw; in radeon_cs_parser_init()
323 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
329 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
335 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
339 size = p->chunks[i].length_dw; in radeon_cs_parser_init()
360 if (p->chunks[i].length_dw > 1) in radeon_cs_parser_init()
362 if (p->chunks[i].length_dw > 2) in radeon_cs_parser_init()
555 if (parser->const_ib.length_dw) { in radeon_cs_ib_vm_chunk()
621 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) { in radeon_cs_ib_fill()
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A Dcik_sdma.c156 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute()
731 ib.length_dw = 5; in cik_sdma_ib_test()
812 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pages()
814 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pages()
815 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pages()
816 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pages()
817 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pages()
818 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pages()
819 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pages()
855 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pages()
[all …]
A Dradeon_vm.c412 ib.length_dw = 0; in radeon_vm_clear_bo()
416 WARN_ON(ib.length_dw > 64); in radeon_vm_clear_bo()
664 ib.length_dw = 0; in radeon_vm_update_page_directory()
701 if (ib.length_dw != 0) { in radeon_vm_update_page_directory()
705 WARN_ON(ib.length_dw > ndw); in radeon_vm_update_page_directory()
1002 ib.length_dw = 0; in radeon_vm_bo_update()
1020 WARN_ON(ib.length_dw > ndw); in radeon_vm_bo_update()
A Dradeon_uvd.c587 if (idx >= relocs_chunk->length_dw) { in radeon_uvd_cs_reloc()
589 idx, relocs_chunk->length_dw); in radeon_uvd_cs_reloc()
702 if (p->chunk_ib->length_dw % 16) { in radeon_uvd_cs_parse()
704 p->chunk_ib->length_dw); in radeon_uvd_cs_parse()
732 } while (p->idx < p->chunk_ib->length_dw); in radeon_uvd_cs_parse()
763 ib.length_dw = 16; in radeon_uvd_send_msg()
/linux-5.15/drivers/gpu/drm/amd/amdgpu/
A Damdgpu_vce.c464 ib->length_dw = 0; in amdgpu_vce_get_create_msg()
465 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */ in amdgpu_vce_get_create_msg()
466 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ in amdgpu_vce_get_create_msg()
467 ib->ptr[ib->length_dw++] = handle; in amdgpu_vce_get_create_msg()
470 ib->ptr[ib->length_dw++] = 0x00000040; /* len */ in amdgpu_vce_get_create_msg()
472 ib->ptr[ib->length_dw++] = 0x00000030; /* len */ in amdgpu_vce_get_create_msg()
473 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */ in amdgpu_vce_get_create_msg()
474 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
475 ib->ptr[ib->length_dw++] = 0x00000042; in amdgpu_vce_get_create_msg()
476 ib->ptr[ib->length_dw++] = 0x0000000a; in amdgpu_vce_get_create_msg()
[all …]
A Dsi_dma.c76 amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in si_dma_ring_emit_ib()
281 ib.length_dw = 4; in si_dma_ring_test_ib()
323 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pte()
325 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pte()
326 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pte()
327 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pte()
328 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pte()
348 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pte()
349 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_write_pte()
350 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in si_dma_vm_write_pte()
[all …]
A Dsdma_v2_4.c267 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib()
634 ib.length_dw = 8; in sdma_v2_4_ring_test_ib()
677 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v2_4_vm_copy_pte()
679 ib->ptr[ib->length_dw++] = bytes; in sdma_v2_4_vm_copy_pte()
680 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v2_4_vm_copy_pte()
681 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v2_4_vm_copy_pte()
682 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v2_4_vm_copy_pte()
683 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v2_4_vm_copy_pte()
684 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v2_4_vm_copy_pte()
704 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v2_4_vm_write_pte()
[all …]
A Dcik_sdma.c238 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
696 ib.length_dw = 5; in cik_sdma_ring_test_ib()
738 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pte()
740 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pte()
741 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pte()
742 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pte()
743 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pte()
744 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pte()
745 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pte()
765 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pte()
[all …]
A Damdgpu_vcn.c573 ib->length_dw = 16; in amdgpu_vcn_dec_send_msg()
710 ib->length_dw = 0; in amdgpu_vcn_dec_sw_send_msg()
712 ib->ptr[ib->length_dw++] = sizeof(struct amdgpu_vcn_decode_buffer) + 8; in amdgpu_vcn_dec_sw_send_msg()
713 ib->ptr[ib->length_dw++] = cpu_to_le32(AMDGPU_VCN_IB_FLAG_DECODE_BUFFER); in amdgpu_vcn_dec_sw_send_msg()
714 decode_buffer = (struct amdgpu_vcn_decode_buffer *)&(ib->ptr[ib->length_dw]); in amdgpu_vcn_dec_sw_send_msg()
715 ib->length_dw += sizeof(struct amdgpu_vcn_decode_buffer) / 4; in amdgpu_vcn_dec_sw_send_msg()
722 for (i = ib->length_dw; i < ib_size_dw; ++i) in amdgpu_vcn_dec_sw_send_msg()
830 ib->length_dw = 0; in amdgpu_vcn_enc_get_create_msg()
831 ib->ptr[ib->length_dw++] = 0x00000018; in amdgpu_vcn_enc_get_create_msg()
832 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in amdgpu_vcn_enc_get_create_msg()
[all …]
A Dsdma_v3_0.c441 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
906 ib.length_dw = 8; in sdma_v3_0_ring_test_ib()
948 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v3_0_vm_copy_pte()
950 ib->ptr[ib->length_dw++] = bytes; in sdma_v3_0_vm_copy_pte()
951 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v3_0_vm_copy_pte()
952 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v3_0_vm_copy_pte()
953 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v3_0_vm_copy_pte()
954 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v3_0_vm_copy_pte()
955 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_copy_pte()
975 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_vm_write_pte()
[all …]
A Dsdma_v5_2.c362 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_2_ring_emit_ib()
999 ib.length_dw = 8; in sdma_v5_2_ring_test_ib()
1045 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v5_2_vm_copy_pte()
1047 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v5_2_vm_copy_pte()
1048 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v5_2_vm_copy_pte()
1049 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v5_2_vm_copy_pte()
1050 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v5_2_vm_copy_pte()
1051 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_2_vm_copy_pte()
1052 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_2_vm_copy_pte()
1073 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_2_vm_write_pte()
[all …]
A Duvd_v6_0.c227 ib->length_dw = 0; in uvd_v6_0_enc_get_create_msg()
228 ib->ptr[ib->length_dw++] = 0x00000018; in uvd_v6_0_enc_get_create_msg()
229 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in uvd_v6_0_enc_get_create_msg()
230 ib->ptr[ib->length_dw++] = handle; in uvd_v6_0_enc_get_create_msg()
231 ib->ptr[ib->length_dw++] = 0x00010000; in uvd_v6_0_enc_get_create_msg()
232 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in uvd_v6_0_enc_get_create_msg()
233 ib->ptr[ib->length_dw++] = addr; in uvd_v6_0_enc_get_create_msg()
235 ib->ptr[ib->length_dw++] = 0x00000014; in uvd_v6_0_enc_get_create_msg()
236 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */ in uvd_v6_0_enc_get_create_msg()
237 ib->ptr[ib->length_dw++] = 0x0000001c; in uvd_v6_0_enc_get_create_msg()
[all …]
A Dsdma_v5_0.c475 amdgpu_ring_write(ring, ib->length_dw); in sdma_v5_0_ring_emit_ib()
1078 ib.length_dw = 8; in sdma_v5_0_ring_test_ib()
1124 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v5_0_vm_copy_pte()
1126 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v5_0_vm_copy_pte()
1127 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v5_0_vm_copy_pte()
1128 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v5_0_vm_copy_pte()
1129 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v5_0_vm_copy_pte()
1130 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v5_0_vm_copy_pte()
1131 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v5_0_vm_copy_pte()
1152 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v5_0_vm_write_pte()
[all …]
A Duvd_v7_0.c234 ib->length_dw = 0; in uvd_v7_0_enc_get_create_msg()
235 ib->ptr[ib->length_dw++] = 0x00000018; in uvd_v7_0_enc_get_create_msg()
236 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in uvd_v7_0_enc_get_create_msg()
237 ib->ptr[ib->length_dw++] = handle; in uvd_v7_0_enc_get_create_msg()
238 ib->ptr[ib->length_dw++] = 0x00000000; in uvd_v7_0_enc_get_create_msg()
239 ib->ptr[ib->length_dw++] = upper_32_bits(addr); in uvd_v7_0_enc_get_create_msg()
240 ib->ptr[ib->length_dw++] = addr; in uvd_v7_0_enc_get_create_msg()
242 ib->ptr[ib->length_dw++] = 0x00000014; in uvd_v7_0_enc_get_create_msg()
243 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */ in uvd_v7_0_enc_get_create_msg()
244 ib->ptr[ib->length_dw++] = 0x0000001c; in uvd_v7_0_enc_get_create_msg()
[all …]
A Dsdma_v4_0.c887 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib()
1645 ib.length_dw = 8; in sdma_v4_0_ring_test_ib()
1689 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v4_0_vm_copy_pte()
1691 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v4_0_vm_copy_pte()
1692 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v4_0_vm_copy_pte()
1693 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v4_0_vm_copy_pte()
1694 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v4_0_vm_copy_pte()
1695 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1696 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1717 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_vm_write_pte()
[all …]
A Damdgpu_vm_sdma.c102 WARN_ON(ib->length_dw == 0); in amdgpu_vm_sdma_commit()
104 WARN_ON(ib->length_dw > p->num_dw_left); in amdgpu_vm_sdma_commit()
218 ndw -= p->job->ibs->length_dw; in amdgpu_vm_sdma_update()
A Dgfx_v9_4_2.c377 ib->length_dw = 0; in gfx_v9_4_2_run_shader()
381 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_4_2_run_shader()
382 ib->ptr[ib->length_dw++] = SOC15_REG_ENTRY_OFFSET(init_regs[i]) in gfx_v9_4_2_run_shader()
384 ib->ptr[ib->length_dw++] = init_regs[i].reg_value; in gfx_v9_4_2_run_shader()
389 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_4_2_run_shader()
390 ib->ptr[ib->length_dw++] = SOC15_REG_OFFSET(GC, 0, regCOMPUTE_PGM_LO) in gfx_v9_4_2_run_shader()
392 ib->ptr[ib->length_dw++] = lower_32_bits(gpu_addr); in gfx_v9_4_2_run_shader()
393 ib->ptr[ib->length_dw++] = upper_32_bits(gpu_addr); in gfx_v9_4_2_run_shader()
396 ib->ptr[ib->length_dw++] = PACKET3(PACKET3_SET_SH_REG, 3); in gfx_v9_4_2_run_shader()
397 ib->ptr[ib->length_dw++] = SOC15_REG_OFFSET(GC, 0, regCOMPUTE_USER_DATA_0) in gfx_v9_4_2_run_shader()
[all …]
A Dgfx_v8_0.c910 ib.length_dw = 5; in gfx_v8_0_ring_test_ib()
1579 ib.length_dw = 0; in gfx_v8_0_do_edc_gpr_workarounds()
1584 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1585 ib.ptr[ib.length_dw++] = vgpr_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1586 ib.ptr[ib.length_dw++] = vgpr_init_regs[i + 1]; in gfx_v8_0_do_edc_gpr_workarounds()
1590 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1591 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1592 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1593 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1596 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v8_0_do_edc_gpr_workarounds()
[all …]
A Dgfx_v9_0.c1123 ib.length_dw = 5; in gfx_v9_0_ring_test_ib()
4624 ib.length_dw = 0; in gfx_v9_0_do_edc_gpr_workarounds()
4629 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v9_0_do_edc_gpr_workarounds()
4630 ib.ptr[ib.length_dw++] = SOC15_REG_ENTRY_OFFSET(vgpr_init_regs_ptr[i]) in gfx_v9_0_do_edc_gpr_workarounds()
4632 ib.ptr[ib.length_dw++] = vgpr_init_regs_ptr[i].reg_value; in gfx_v9_0_do_edc_gpr_workarounds()
4636 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v9_0_do_edc_gpr_workarounds()
4637 ib.ptr[ib.length_dw++] = SOC15_REG_OFFSET(GC, 0, mmCOMPUTE_PGM_LO) in gfx_v9_0_do_edc_gpr_workarounds()
4639 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr); in gfx_v9_0_do_edc_gpr_workarounds()
4640 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr); in gfx_v9_0_do_edc_gpr_workarounds()
4643 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v9_0_do_edc_gpr_workarounds()
[all …]
A Damdgpu_cs.c167 p->chunks[i].length_dw = user_chunk.length_dw; in amdgpu_cs_parser_init()
169 size = p->chunks[i].length_dw; in amdgpu_cs_parser_init()
191 if (p->chunks[i].length_dw * sizeof(uint32_t) < size) { in amdgpu_cs_parser_init()
205 if (p->chunks[i].length_dw * sizeof(uint32_t) < size) { in amdgpu_cs_parser_init()
937 ib->length_dw = chunk_ib->ib_bytes / 4; in amdgpu_cs_ib_fill()
960 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_fence_dep()
1033 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_syncobj_in_dep()
1054 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_syncobj_timeline_in_dep()
1076 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_syncobj_out_dep()
1112 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_syncobj_timeline_out_dep()
A Damdgpu_ring.c107 while (ib->length_dw & ring->funcs->align_mask) in amdgpu_ring_generic_pad_ib()
108 ib->ptr[ib->length_dw++] = ring->funcs->nop; in amdgpu_ring_generic_pad_ib()
/linux-5.15/drivers/net/ethernet/qlogic/qed/
A Dqed_hw.c462 le16_to_cpu(p_command->length_dw), in qed_dmae_post_command()
477 le16_to_cpu(p_command->length_dw), in qed_dmae_post_command()
608 u32 length_dw) in qed_dmae_execute_sub_operation() argument
626 length_dw * sizeof(u32)); in qed_dmae_execute_sub_operation()
647 cmd->length_dw = cpu_to_le16((u16)length_dw); in qed_dmae_execute_sub_operation()
656 src_addr, dst_addr, length_dw); in qed_dmae_execute_sub_operation()
663 length_dw * sizeof(u32)); in qed_dmae_execute_sub_operation()

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