1 /* 2 * Copyright (c) 2006-2008 Simtec Electronics 3 * http://armlinux.simtec.co.uk/ 4 * Ben Dooks <ben@simtec.co.uk> 5 * 6 * S3C24XX CPU Frequency scaling 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/init.h> 14 #include <linux/module.h> 15 #include <linux/interrupt.h> 16 #include <linux/ioport.h> 17 #include <linux/cpufreq.h> 18 #include <linux/cpu.h> 19 #include <linux/clk.h> 20 #include <linux/err.h> 21 #include <linux/io.h> 22 #include <linux/device.h> 23 #include <linux/sysfs.h> 24 #include <linux/slab.h> 25 26 #include <asm/mach/arch.h> 27 #include <asm/mach/map.h> 28 29 #include <plat/cpu.h> 30 #include <plat/clock.h> 31 #include <plat/cpu-freq-core.h> 32 33 #include <mach/regs-clock.h> 34 35 /* note, cpufreq support deals in kHz, no Hz */ 36 37 static struct cpufreq_driver s3c24xx_driver; 38 static struct s3c_cpufreq_config cpu_cur; 39 static struct s3c_iotimings s3c24xx_iotiming; 40 static struct cpufreq_frequency_table *pll_reg; 41 static unsigned int last_target = ~0; 42 static unsigned int ftab_size; 43 static struct cpufreq_frequency_table *ftab; 44 45 static struct clk *_clk_mpll; 46 static struct clk *_clk_xtal; 47 static struct clk *clk_fclk; 48 static struct clk *clk_hclk; 49 static struct clk *clk_pclk; 50 static struct clk *clk_arm; 51 52 #ifdef CONFIG_CPU_FREQ_S3C24XX_DEBUGFS 53 struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void) 54 { 55 return &cpu_cur; 56 } 57 58 struct s3c_iotimings *s3c_cpufreq_getiotimings(void) 59 { 60 return &s3c24xx_iotiming; 61 } 62 #endif /* CONFIG_CPU_FREQ_S3C24XX_DEBUGFS */ 63 64 static void s3c_cpufreq_getcur(struct s3c_cpufreq_config *cfg) 65 { 66 unsigned long fclk, pclk, hclk, armclk; 67 68 cfg->freq.fclk = fclk = clk_get_rate(clk_fclk); 69 cfg->freq.hclk = hclk = clk_get_rate(clk_hclk); 70 cfg->freq.pclk = pclk = clk_get_rate(clk_pclk); 71 cfg->freq.armclk = armclk = clk_get_rate(clk_arm); 72 73 cfg->pll.driver_data = __raw_readl(S3C2410_MPLLCON); 74 cfg->pll.frequency = fclk; 75 76 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); 77 78 cfg->divs.h_divisor = fclk / hclk; 79 cfg->divs.p_divisor = fclk / pclk; 80 } 81 82 static inline void s3c_cpufreq_calc(struct s3c_cpufreq_config *cfg) 83 { 84 unsigned long pll = cfg->pll.frequency; 85 86 cfg->freq.fclk = pll; 87 cfg->freq.hclk = pll / cfg->divs.h_divisor; 88 cfg->freq.pclk = pll / cfg->divs.p_divisor; 89 90 /* convert hclk into 10ths of nanoseconds for io calcs */ 91 cfg->freq.hclk_tns = 1000000000 / (cfg->freq.hclk / 10); 92 } 93 94 static inline int closer(unsigned int target, unsigned int n, unsigned int c) 95 { 96 int diff_cur = abs(target - c); 97 int diff_new = abs(target - n); 98 99 return (diff_new < diff_cur); 100 } 101 102 static void s3c_cpufreq_show(const char *pfx, 103 struct s3c_cpufreq_config *cfg) 104 { 105 s3c_freq_dbg("%s: Fvco=%u, F=%lu, A=%lu, H=%lu (%u), P=%lu (%u)\n", 106 pfx, cfg->pll.frequency, cfg->freq.fclk, cfg->freq.armclk, 107 cfg->freq.hclk, cfg->divs.h_divisor, 108 cfg->freq.pclk, cfg->divs.p_divisor); 109 } 110 111 /* functions to wrapper the driver info calls to do the cpu specific work */ 112 113 static void s3c_cpufreq_setio(struct s3c_cpufreq_config *cfg) 114 { 115 if (cfg->info->set_iotiming) 116 (cfg->info->set_iotiming)(cfg, &s3c24xx_iotiming); 117 } 118 119 static int s3c_cpufreq_calcio(struct s3c_cpufreq_config *cfg) 120 { 121 if (cfg->info->calc_iotiming) 122 return (cfg->info->calc_iotiming)(cfg, &s3c24xx_iotiming); 123 124 return 0; 125 } 126 127 static void s3c_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) 128 { 129 (cfg->info->set_refresh)(cfg); 130 } 131 132 static void s3c_cpufreq_setdivs(struct s3c_cpufreq_config *cfg) 133 { 134 (cfg->info->set_divs)(cfg); 135 } 136 137 static int s3c_cpufreq_calcdivs(struct s3c_cpufreq_config *cfg) 138 { 139 return (cfg->info->calc_divs)(cfg); 140 } 141 142 static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg) 143 { 144 (cfg->info->set_fvco)(cfg); 145 } 146 147 static inline void s3c_cpufreq_resume_clocks(void) 148 { 149 cpu_cur.info->resume_clocks(); 150 } 151 152 static inline void s3c_cpufreq_updateclk(struct clk *clk, 153 unsigned int freq) 154 { 155 clk_set_rate(clk, freq); 156 } 157 158 static int s3c_cpufreq_settarget(struct cpufreq_policy *policy, 159 unsigned int target_freq, 160 struct cpufreq_frequency_table *pll) 161 { 162 struct s3c_cpufreq_freqs freqs; 163 struct s3c_cpufreq_config cpu_new; 164 unsigned long flags; 165 166 cpu_new = cpu_cur; /* copy new from current */ 167 168 s3c_cpufreq_show("cur", &cpu_cur); 169 170 /* TODO - check for DMA currently outstanding */ 171 172 cpu_new.pll = pll ? *pll : cpu_cur.pll; 173 174 if (pll) 175 freqs.pll_changing = 1; 176 177 /* update our frequencies */ 178 179 cpu_new.freq.armclk = target_freq; 180 cpu_new.freq.fclk = cpu_new.pll.frequency; 181 182 if (s3c_cpufreq_calcdivs(&cpu_new) < 0) { 183 printk(KERN_ERR "no divisors for %d\n", target_freq); 184 goto err_notpossible; 185 } 186 187 s3c_freq_dbg("%s: got divs\n", __func__); 188 189 s3c_cpufreq_calc(&cpu_new); 190 191 s3c_freq_dbg("%s: calculated frequencies for new\n", __func__); 192 193 if (cpu_new.freq.hclk != cpu_cur.freq.hclk) { 194 if (s3c_cpufreq_calcio(&cpu_new) < 0) { 195 printk(KERN_ERR "%s: no IO timings\n", __func__); 196 goto err_notpossible; 197 } 198 } 199 200 s3c_cpufreq_show("new", &cpu_new); 201 202 /* setup our cpufreq parameters */ 203 204 freqs.old = cpu_cur.freq; 205 freqs.new = cpu_new.freq; 206 207 freqs.freqs.old = cpu_cur.freq.armclk / 1000; 208 freqs.freqs.new = cpu_new.freq.armclk / 1000; 209 210 /* update f/h/p clock settings before we issue the change 211 * notification, so that drivers do not need to do anything 212 * special if they want to recalculate on CPUFREQ_PRECHANGE. */ 213 214 s3c_cpufreq_updateclk(_clk_mpll, cpu_new.pll.frequency); 215 s3c_cpufreq_updateclk(clk_fclk, cpu_new.freq.fclk); 216 s3c_cpufreq_updateclk(clk_hclk, cpu_new.freq.hclk); 217 s3c_cpufreq_updateclk(clk_pclk, cpu_new.freq.pclk); 218 219 /* start the frequency change */ 220 cpufreq_notify_transition(policy, &freqs.freqs, CPUFREQ_PRECHANGE); 221 222 /* If hclk is staying the same, then we do not need to 223 * re-write the IO or the refresh timings whilst we are changing 224 * speed. */ 225 226 local_irq_save(flags); 227 228 /* is our memory clock slowing down? */ 229 if (cpu_new.freq.hclk < cpu_cur.freq.hclk) { 230 s3c_cpufreq_setrefresh(&cpu_new); 231 s3c_cpufreq_setio(&cpu_new); 232 } 233 234 if (cpu_new.freq.fclk == cpu_cur.freq.fclk) { 235 /* not changing PLL, just set the divisors */ 236 237 s3c_cpufreq_setdivs(&cpu_new); 238 } else { 239 if (cpu_new.freq.fclk < cpu_cur.freq.fclk) { 240 /* slow the cpu down, then set divisors */ 241 242 s3c_cpufreq_setfvco(&cpu_new); 243 s3c_cpufreq_setdivs(&cpu_new); 244 } else { 245 /* set the divisors, then speed up */ 246 247 s3c_cpufreq_setdivs(&cpu_new); 248 s3c_cpufreq_setfvco(&cpu_new); 249 } 250 } 251 252 /* did our memory clock speed up */ 253 if (cpu_new.freq.hclk > cpu_cur.freq.hclk) { 254 s3c_cpufreq_setrefresh(&cpu_new); 255 s3c_cpufreq_setio(&cpu_new); 256 } 257 258 /* update our current settings */ 259 cpu_cur = cpu_new; 260 261 local_irq_restore(flags); 262 263 /* notify everyone we've done this */ 264 cpufreq_notify_transition(policy, &freqs.freqs, CPUFREQ_POSTCHANGE); 265 266 s3c_freq_dbg("%s: finished\n", __func__); 267 return 0; 268 269 err_notpossible: 270 printk(KERN_ERR "no compatible settings for %d\n", target_freq); 271 return -EINVAL; 272 } 273 274 /* s3c_cpufreq_target 275 * 276 * called by the cpufreq core to adjust the frequency that the CPU 277 * is currently running at. 278 */ 279 280 static int s3c_cpufreq_target(struct cpufreq_policy *policy, 281 unsigned int target_freq, 282 unsigned int relation) 283 { 284 struct cpufreq_frequency_table *pll; 285 unsigned int index; 286 287 /* avoid repeated calls which cause a needless amout of duplicated 288 * logging output (and CPU time as the calculation process is 289 * done) */ 290 if (target_freq == last_target) 291 return 0; 292 293 last_target = target_freq; 294 295 s3c_freq_dbg("%s: policy %p, target %u, relation %u\n", 296 __func__, policy, target_freq, relation); 297 298 if (ftab) { 299 if (cpufreq_frequency_table_target(policy, ftab, 300 target_freq, relation, 301 &index)) { 302 s3c_freq_dbg("%s: table failed\n", __func__); 303 return -EINVAL; 304 } 305 306 s3c_freq_dbg("%s: adjust %d to entry %d (%u)\n", __func__, 307 target_freq, index, ftab[index].frequency); 308 target_freq = ftab[index].frequency; 309 } 310 311 target_freq *= 1000; /* convert target to Hz */ 312 313 /* find the settings for our new frequency */ 314 315 if (!pll_reg || cpu_cur.lock_pll) { 316 /* either we've not got any PLL values, or we've locked 317 * to the current one. */ 318 pll = NULL; 319 } else { 320 struct cpufreq_policy tmp_policy; 321 int ret; 322 323 /* we keep the cpu pll table in Hz, to ensure we get an 324 * accurate value for the PLL output. */ 325 326 tmp_policy.min = policy->min * 1000; 327 tmp_policy.max = policy->max * 1000; 328 tmp_policy.cpu = policy->cpu; 329 330 /* cpufreq_frequency_table_target uses a pointer to 'index' 331 * which is the number of the table entry, not the value of 332 * the table entry's index field. */ 333 334 ret = cpufreq_frequency_table_target(&tmp_policy, pll_reg, 335 target_freq, relation, 336 &index); 337 338 if (ret < 0) { 339 printk(KERN_ERR "%s: no PLL available\n", __func__); 340 goto err_notpossible; 341 } 342 343 pll = pll_reg + index; 344 345 s3c_freq_dbg("%s: target %u => %u\n", 346 __func__, target_freq, pll->frequency); 347 348 target_freq = pll->frequency; 349 } 350 351 return s3c_cpufreq_settarget(policy, target_freq, pll); 352 353 err_notpossible: 354 printk(KERN_ERR "no compatible settings for %d\n", target_freq); 355 return -EINVAL; 356 } 357 358 static unsigned int s3c_cpufreq_get(unsigned int cpu) 359 { 360 return clk_get_rate(clk_arm) / 1000; 361 } 362 363 struct clk *s3c_cpufreq_clk_get(struct device *dev, const char *name) 364 { 365 struct clk *clk; 366 367 clk = clk_get(dev, name); 368 if (IS_ERR(clk)) 369 printk(KERN_ERR "cpufreq: failed to get clock '%s'\n", name); 370 371 return clk; 372 } 373 374 static int s3c_cpufreq_init(struct cpufreq_policy *policy) 375 { 376 printk(KERN_INFO "%s: initialising policy %p\n", __func__, policy); 377 378 if (policy->cpu != 0) 379 return -EINVAL; 380 381 policy->cur = s3c_cpufreq_get(0); 382 policy->min = policy->cpuinfo.min_freq = 0; 383 policy->max = policy->cpuinfo.max_freq = cpu_cur.info->max.fclk / 1000; 384 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 385 386 /* feed the latency information from the cpu driver */ 387 policy->cpuinfo.transition_latency = cpu_cur.info->latency; 388 389 if (ftab) 390 cpufreq_frequency_table_cpuinfo(policy, ftab); 391 392 return 0; 393 } 394 395 static __init int s3c_cpufreq_initclks(void) 396 { 397 _clk_mpll = s3c_cpufreq_clk_get(NULL, "mpll"); 398 _clk_xtal = s3c_cpufreq_clk_get(NULL, "xtal"); 399 clk_fclk = s3c_cpufreq_clk_get(NULL, "fclk"); 400 clk_hclk = s3c_cpufreq_clk_get(NULL, "hclk"); 401 clk_pclk = s3c_cpufreq_clk_get(NULL, "pclk"); 402 clk_arm = s3c_cpufreq_clk_get(NULL, "armclk"); 403 404 if (IS_ERR(clk_fclk) || IS_ERR(clk_hclk) || IS_ERR(clk_pclk) || 405 IS_ERR(_clk_mpll) || IS_ERR(clk_arm) || IS_ERR(_clk_xtal)) { 406 printk(KERN_ERR "%s: could not get clock(s)\n", __func__); 407 return -ENOENT; 408 } 409 410 printk(KERN_INFO "%s: clocks f=%lu,h=%lu,p=%lu,a=%lu\n", __func__, 411 clk_get_rate(clk_fclk) / 1000, 412 clk_get_rate(clk_hclk) / 1000, 413 clk_get_rate(clk_pclk) / 1000, 414 clk_get_rate(clk_arm) / 1000); 415 416 return 0; 417 } 418 419 static int s3c_cpufreq_verify(struct cpufreq_policy *policy) 420 { 421 if (policy->cpu != 0) 422 return -EINVAL; 423 424 return 0; 425 } 426 427 #ifdef CONFIG_PM 428 static struct cpufreq_frequency_table suspend_pll; 429 static unsigned int suspend_freq; 430 431 static int s3c_cpufreq_suspend(struct cpufreq_policy *policy) 432 { 433 suspend_pll.frequency = clk_get_rate(_clk_mpll); 434 suspend_pll.driver_data = __raw_readl(S3C2410_MPLLCON); 435 suspend_freq = s3c_cpufreq_get(0) * 1000; 436 437 return 0; 438 } 439 440 static int s3c_cpufreq_resume(struct cpufreq_policy *policy) 441 { 442 int ret; 443 444 s3c_freq_dbg("%s: resuming with policy %p\n", __func__, policy); 445 446 last_target = ~0; /* invalidate last_target setting */ 447 448 /* first, find out what speed we resumed at. */ 449 s3c_cpufreq_resume_clocks(); 450 451 /* whilst we will be called later on, we try and re-set the 452 * cpu frequencies as soon as possible so that we do not end 453 * up resuming devices and then immediately having to re-set 454 * a number of settings once these devices have restarted. 455 * 456 * as a note, it is expected devices are not used until they 457 * have been un-suspended and at that time they should have 458 * used the updated clock settings. 459 */ 460 461 ret = s3c_cpufreq_settarget(NULL, suspend_freq, &suspend_pll); 462 if (ret) { 463 printk(KERN_ERR "%s: failed to reset pll/freq\n", __func__); 464 return ret; 465 } 466 467 return 0; 468 } 469 #else 470 #define s3c_cpufreq_resume NULL 471 #define s3c_cpufreq_suspend NULL 472 #endif 473 474 static struct cpufreq_driver s3c24xx_driver = { 475 .flags = CPUFREQ_STICKY, 476 .verify = s3c_cpufreq_verify, 477 .target = s3c_cpufreq_target, 478 .get = s3c_cpufreq_get, 479 .init = s3c_cpufreq_init, 480 .suspend = s3c_cpufreq_suspend, 481 .resume = s3c_cpufreq_resume, 482 .name = "s3c24xx", 483 }; 484 485 486 int __init s3c_cpufreq_register(struct s3c_cpufreq_info *info) 487 { 488 if (!info || !info->name) { 489 printk(KERN_ERR "%s: failed to pass valid information\n", 490 __func__); 491 return -EINVAL; 492 } 493 494 printk(KERN_INFO "S3C24XX CPU Frequency driver, %s cpu support\n", 495 info->name); 496 497 /* check our driver info has valid data */ 498 499 BUG_ON(info->set_refresh == NULL); 500 BUG_ON(info->set_divs == NULL); 501 BUG_ON(info->calc_divs == NULL); 502 503 /* info->set_fvco is optional, depending on whether there 504 * is a need to set the clock code. */ 505 506 cpu_cur.info = info; 507 508 /* Note, driver registering should probably update locktime */ 509 510 return 0; 511 } 512 513 int __init s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) 514 { 515 struct s3c_cpufreq_board *ours; 516 517 if (!board) { 518 printk(KERN_INFO "%s: no board data\n", __func__); 519 return -EINVAL; 520 } 521 522 /* Copy the board information so that each board can make this 523 * initdata. */ 524 525 ours = kzalloc(sizeof(struct s3c_cpufreq_board), GFP_KERNEL); 526 if (ours == NULL) { 527 printk(KERN_ERR "%s: no memory\n", __func__); 528 return -ENOMEM; 529 } 530 531 *ours = *board; 532 cpu_cur.board = ours; 533 534 return 0; 535 } 536 537 int __init s3c_cpufreq_auto_io(void) 538 { 539 int ret; 540 541 if (!cpu_cur.info->get_iotiming) { 542 printk(KERN_ERR "%s: get_iotiming undefined\n", __func__); 543 return -ENOENT; 544 } 545 546 printk(KERN_INFO "%s: working out IO settings\n", __func__); 547 548 ret = (cpu_cur.info->get_iotiming)(&cpu_cur, &s3c24xx_iotiming); 549 if (ret) 550 printk(KERN_ERR "%s: failed to get timings\n", __func__); 551 552 return ret; 553 } 554 555 /* if one or is zero, then return the other, otherwise return the min */ 556 #define do_min(_a, _b) ((_a) == 0 ? (_b) : (_b) == 0 ? (_a) : min(_a, _b)) 557 558 /** 559 * s3c_cpufreq_freq_min - find the minimum settings for the given freq. 560 * @dst: The destination structure 561 * @a: One argument. 562 * @b: The other argument. 563 * 564 * Create a minimum of each frequency entry in the 'struct s3c_freq', 565 * unless the entry is zero when it is ignored and the non-zero argument 566 * used. 567 */ 568 static void s3c_cpufreq_freq_min(struct s3c_freq *dst, 569 struct s3c_freq *a, struct s3c_freq *b) 570 { 571 dst->fclk = do_min(a->fclk, b->fclk); 572 dst->hclk = do_min(a->hclk, b->hclk); 573 dst->pclk = do_min(a->pclk, b->pclk); 574 dst->armclk = do_min(a->armclk, b->armclk); 575 } 576 577 static inline u32 calc_locktime(u32 freq, u32 time_us) 578 { 579 u32 result; 580 581 result = freq * time_us; 582 result = DIV_ROUND_UP(result, 1000 * 1000); 583 584 return result; 585 } 586 587 static void s3c_cpufreq_update_loctkime(void) 588 { 589 unsigned int bits = cpu_cur.info->locktime_bits; 590 u32 rate = (u32)clk_get_rate(_clk_xtal); 591 u32 val; 592 593 if (bits == 0) { 594 WARN_ON(1); 595 return; 596 } 597 598 val = calc_locktime(rate, cpu_cur.info->locktime_u) << bits; 599 val |= calc_locktime(rate, cpu_cur.info->locktime_m); 600 601 printk(KERN_INFO "%s: new locktime is 0x%08x\n", __func__, val); 602 __raw_writel(val, S3C2410_LOCKTIME); 603 } 604 605 static int s3c_cpufreq_build_freq(void) 606 { 607 int size, ret; 608 609 if (!cpu_cur.info->calc_freqtable) 610 return -EINVAL; 611 612 kfree(ftab); 613 ftab = NULL; 614 615 size = cpu_cur.info->calc_freqtable(&cpu_cur, NULL, 0); 616 size++; 617 618 ftab = kmalloc(sizeof(struct cpufreq_frequency_table) * size, GFP_KERNEL); 619 if (!ftab) { 620 printk(KERN_ERR "%s: no memory for tables\n", __func__); 621 return -ENOMEM; 622 } 623 624 ftab_size = size; 625 626 ret = cpu_cur.info->calc_freqtable(&cpu_cur, ftab, size); 627 s3c_cpufreq_addfreq(ftab, ret, size, CPUFREQ_TABLE_END); 628 629 return 0; 630 } 631 632 static int __init s3c_cpufreq_initcall(void) 633 { 634 int ret = 0; 635 636 if (cpu_cur.info && cpu_cur.board) { 637 ret = s3c_cpufreq_initclks(); 638 if (ret) 639 goto out; 640 641 /* get current settings */ 642 s3c_cpufreq_getcur(&cpu_cur); 643 s3c_cpufreq_show("cur", &cpu_cur); 644 645 if (cpu_cur.board->auto_io) { 646 ret = s3c_cpufreq_auto_io(); 647 if (ret) { 648 printk(KERN_ERR "%s: failed to get io timing\n", 649 __func__); 650 goto out; 651 } 652 } 653 654 if (cpu_cur.board->need_io && !cpu_cur.info->set_iotiming) { 655 printk(KERN_ERR "%s: no IO support registered\n", 656 __func__); 657 ret = -EINVAL; 658 goto out; 659 } 660 661 if (!cpu_cur.info->need_pll) 662 cpu_cur.lock_pll = 1; 663 664 s3c_cpufreq_update_loctkime(); 665 666 s3c_cpufreq_freq_min(&cpu_cur.max, &cpu_cur.board->max, 667 &cpu_cur.info->max); 668 669 if (cpu_cur.info->calc_freqtable) 670 s3c_cpufreq_build_freq(); 671 672 ret = cpufreq_register_driver(&s3c24xx_driver); 673 } 674 675 out: 676 return ret; 677 } 678 679 late_initcall(s3c_cpufreq_initcall); 680 681 /** 682 * s3c_plltab_register - register CPU PLL table. 683 * @plls: The list of PLL entries. 684 * @plls_no: The size of the PLL entries @plls. 685 * 686 * Register the given set of PLLs with the system. 687 */ 688 int __init s3c_plltab_register(struct cpufreq_frequency_table *plls, 689 unsigned int plls_no) 690 { 691 struct cpufreq_frequency_table *vals; 692 unsigned int size; 693 694 size = sizeof(struct cpufreq_frequency_table) * (plls_no + 1); 695 696 vals = kmalloc(size, GFP_KERNEL); 697 if (vals) { 698 memcpy(vals, plls, size); 699 pll_reg = vals; 700 701 /* write a terminating entry, we don't store it in the 702 * table that is stored in the kernel */ 703 vals += plls_no; 704 vals->frequency = CPUFREQ_TABLE_END; 705 706 printk(KERN_INFO "cpufreq: %d PLL entries\n", plls_no); 707 } else 708 printk(KERN_ERR "cpufreq: no memory for PLL tables\n"); 709 710 return vals ? 0 : -ENOMEM; 711 } 712